1. Field of the Invention
The present invention relates to a four quadrant multiplier used in mixers and modulators. In particular, the invention relates to feedback reactances in the multiplier used to improve the input compression point performance of the multiplier used as a mixer.
2. Description of Related Art
The gain performance of any kind of realizable transistor amplifier may be analyzed in terms of its gain in a small signal region and a large signal region. The small signal region is where the output signal has an amplitude proportional to the amplitude of the input signal and no substantial distortion occurs. However, as larger signals are input to the amplifier, certain non-linearities of transistors and circuits become more pronounced. In the extreme, a large sinusoidal signal is limited or clipped to generate an output signal rich with harmonics.
The ratio of the amplitude of the output signal to the amplitude of the large signal input (i.e., large signal gain) is no longer the same as the small signal gain. The large signal gain is less than the small signal gain, and this reduction of gain with larger signals is called compression. The input compression of an amplifier is the signal power (usually measured in dBm) that will produce a large signal gain that is 1 dB less than the small signal gain. An amplifier driven by signal powers larger than the input compression point will generate severe non-linearities and harmonics.
When amplifiers, transistors, diodes or any non-linear element are used in a mixer, a designer should consider the third order intermodulation performance as well as the input compression performance. Third order intermodulation occurs when undesired signals are input to the mixer at frequencies near the frequency of the desired signal. For example, if the desired RF signal is 1,000 MHz, undesired signals may occur at 1,002 MHz and 1,004 MHz (or at 1,003 MHz and 1,006 MHz, etc). These undesired frequencies are too close to the desired frequency to be removeable by any practical pre-mixer filter. If the amplitude of the 1,002 MHz signal were large enough to operate in the large signal region and cause second order harmonics in the mixer, this second order harmonic (i.e., 2,004 MHz) would mix with the other undesired signal (i.e., 1,004 MHz) to produce a signal at the desired signal frequency (two times 1,002 MHz less 1,004 MHz is 1,000 MHz) that is indistinguishable by frequency from the desired signal even with the most selective IF amplifier. If the amplitude of the undesired signal at 1,002 MHz where large enough to produce a second harmonic, a phantom signal at 1,004 MHz will be processed by the mixer as if it were a desired signal at 1,000 MHz. Even if there where no phantom signal, the mixer noise figure would include the thermal noise in an IF bandwidth about 1,004 MHz.
It makes little difference whether a desired signal is too large or an undesired near frequency is too large. To maintain a near distortionless mixer, a designer should ensure that the input signals have powers that are less than the input compression point.
Differential amplifiers are a basic building block used in a four quadrant multiplier known as a Gilbert cell mixer. In FIG. 1, known differential amplifier D includes first and second transistors connected at common emitter CE. Differential amplifier D receives first and second inputs IN1 and IN2 at respective bases of the first and second transistors and generates outputs OUT2 and OUT1 at respective collectors of the first and second transistors.
In FIG. 2, a known four quadrant multiplier has first and second differential amplifiers D1 and D2 in a cross connected configuration so as to receive first and second inputs IN1 and IN2 at bases of respective first and second transistors in each of the first and second differential amplifiers D1 and D2, and so as to generate output OUT2 at a collector of the first transistor of first differential amplifier D1 and generate output OUT1 at a collector of the first transistor of second differential amplifier D2. The four quadrant multiplier of FIG. 2 further includes first transistor Q1 having a collector coupled to a common emitter node of first differential amplifier D1 and second transistor Q2 having a collector coupled to a common emitter node of second differential amplifier D2. The bases of transistors Q1 and Q2 are coupled to respective third and fourth inputs IN3 and IN4. In FIG. 2, the emitters of transistors Q1 and Q2 are coupled together and to a common node of the four quadrant multiplier.
In FIG. 3, a known four quadrant multiplier has first and second cross connected differential amplifiers D1 and D2 as discussed with respect to FIG. 2, has first and second transistors Q1 and Q2 having respective collectors coupled to respective common emitter nodes of respective differential amplifiers D1 and D2 as discussed with respect to FIG. 2, and has the bases of transistors Q1 and Q2 coupled to respective third inputs IN3 and IN4 as discussed with respect to FIG. 2. However, unlike the circuit of FIG. 2, in FIG. 3, the emitters of transistors Q1 and Q2 are coupled through respective resistors R1 and R2 to a common node of the four quadrant multiplier.
In operation of the circuits of either FIG. 2 or FIG. 3, a first signal is applied differentially to inputs IN1 and IN2 and has only such "common mode" component as needed to properly bias the transistors of differential amplifiers D1 and D2. A second signal is applied differentially to inputs IN3 and IN4 and has only such "common mode" component as is needed to properly bias transistors Q1 and Q2 so as to provide a desired operating point. In such a configuration, outputs OUT1 and OUT2 provide the four quadrant multiplied product in differential form of the first and second signals. Such a circuit is commonly known as a Gilbert Cell Mixer and finds application in integrated mixers and modulators.
Key specifications for a down converting mixer in a cellular phone are typically conversion gain of 10 dB, input compression point (ICP) at least -10 dBm and a single sideband noise figure of no more than 9 dB. The conversion gain of the circuit of FIG. 2 is typically higher than desired, for example, greater than 20 dB. High conversion gain is undesirable in the multiplier mixer because output signals should be maintained at power levels below the large signal region to avoid distortion and production of third order intermodulation. To limit the output signals from high gain mixers to the small signal region, input signal powers must be maintained much lower than is desired. A design that sets the maximum input signal power equal to the input compression point for a high conversion gain mixer will have a regretably small margin over the thermal noise in the intermediate frequency bandwidth. At least a lower conversion gain mixer could set its maximum input signal power higher, and thus the margin over noise will be greater than could be achieved with a high conversion gain mixer.
In low frequency applications, resistors R1 and R2 of FIG. 3 may be inserted in the mixer circuit of FIG. 2 to reduce the conversion gain; however, at higher RF frequencies, the resulting increase in noise figure is usually not acceptable.
Radio frequencies (RF) in the modern cellular telephone environment generally refer to frequencies above 500 MHz and typically 1,000 MHz to 2,000 MHz. Known amplifiers operating at these RF frequencies sometimes employ feedback networks in order to achieve certain key performance parameters while sacrificing others. However, reactive feedback networks have not been applied to four quadrant multipliers used as RF mixers.